Ubiquitous Multiprocessor Research
Archives
1. Background
Once, the foundation of society used to mean public
facilities like transportation or energy infrastructure. In the 1990s,
it extended to information technology. Now, in the ubiquitous age, everything
is connected to networks: not only computers but also various devices
including cell phones, home appliances, and cars. This age requires computing
resources with two opposing attributes: higher performance and lower power
consumption.
2. Our Goal
The goal of our research is to develop a Ubiquitous
Multi-Processor (UMP) suitable for the coming ubiquitous age. We call
the architecture "UMP network", which includes UMPs and their
networks. The UMP network enables each device with low power consumption
to share rich resources on their networks.
Personal Life Partner (PLP) is one of the targets using the UMP network. PLP is not a single device or application; rather, it means a user-friendly solution which we can call "partner".
PLP suggests actions suitable for personal life scenes and events by using rich resources in the UMP network. Thus, it enables emotion and context-aware communication with people all over the world and a fulfilling life.
Personal Life Partner (PLP) is one of the targets using the UMP network. PLP is not a single device or application; rather, it means a user-friendly solution which we can call "partner".
PLP suggests actions suitable for personal life scenes and events by using rich resources in the UMP network. Thus, it enables emotion and context-aware communication with people all over the world and a fulfilling life.
3. Details of Research
The UMP network requires advanced security and flexibility
to connect to networks like sensor networks. Also, it needs high performance
and scalability to connect various devices.
Do you know what a Tangram is? It's a kind of mathematical puzzle consisting of several different pieces. You put them together and can create over 100 shapes such as a rabbit and a yacht.
As shown in Fig. 1, the architecture of our processor system is similar to putting together different Tangram pieces and creating a figure. The processor system provides processing elements (PEs) for various core functions, just like the puzzle pieces.
Do you know what a Tangram is? It's a kind of mathematical puzzle consisting of several different pieces. You put them together and can create over 100 shapes such as a rabbit and a yacht.
As shown in Fig. 1, the architecture of our processor system is similar to putting together different Tangram pieces and creating a figure. The processor system provides processing elements (PEs) for various core functions, just like the puzzle pieces.
Figure1: Tangram Analogy for Our Processor System
Dynamic changes of network connections between PEs
enable the functionality of this system to be changed. At some times the
system is optimized for image processing, and at other times it is dedicated
to processing for communication, just like the Tangram pieces can produce
a rabbit or a yacht by moving and flipping the pieces differently.
We thus aim to realize a key function by dynamically combining PEs with different functions.
However, there is no need to use all PEs in the system. Unnecessary PEs can be disconnected in order to reduce the power consumption. We expect this system also can add or borrow other PEs from other processors across the Internet or other networks. This makes additional functions and incremental computing resources available.
We thus aim to realize a key function by dynamically combining PEs with different functions.
However, there is no need to use all PEs in the system. Unnecessary PEs can be disconnected in order to reduce the power consumption. We expect this system also can add or borrow other PEs from other processors across the Internet or other networks. This makes additional functions and incremental computing resources available.
Our research consists of three phases:
(1)Phase1:Design of the architecture - UMP network
A simulator will be developed to simulate the UMP network. Using the simulator, we will design the architecture.
(2)Phase2:Verification in cyberspace
The functions of the UMP network will be verified by high-speed simulation in cyberspace.
(3)Phase3:Demonstration in the real world
The UMP prototype will be developed with software-oriented and hardware-oriented methodologies. An evaluation board using FPGA will be developed as a hardware prototype, which will be used as a personal mobile terminal in the UMP network. Then, an existing inference engine or search engine will be run on an emulator of the UMP network as a software prototype. We will establish a demonstration environment by connecting these prototypes mutually through the Internet or LAN.
Finally, we will confirm the effectiveness of this architecture, and evaluate its feasibility in the ubiquitous age.
(1)Phase1:Design of the architecture - UMP network
A simulator will be developed to simulate the UMP network. Using the simulator, we will design the architecture.
(2)Phase2:Verification in cyberspace
The functions of the UMP network will be verified by high-speed simulation in cyberspace.
(3)Phase3:Demonstration in the real world
The UMP prototype will be developed with software-oriented and hardware-oriented methodologies. An evaluation board using FPGA will be developed as a hardware prototype, which will be used as a personal mobile terminal in the UMP network. Then, an existing inference engine or search engine will be run on an emulator of the UMP network as a software prototype. We will establish a demonstration environment by connecting these prototypes mutually through the Internet or LAN.
Finally, we will confirm the effectiveness of this architecture, and evaluate its feasibility in the ubiquitous age.
Figure 2: System Overview in Phase3
4. Researchers
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Mitsunori Kubo (Research Coordinator and Chief Architect) |
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Arata Shinozaki (Researcher) |
